A first memory portion of a plurality of memory portions is configured to determine a designated position of the first memory portion (in a predefined sequence of the plurality of memory portions), and to receive a sub-request conveyed to the plurality of memory portions in the first memory device. The sub-request has a single contiguous instruction portion and a plurality of data segments. The single contiguous instruction portion has a single relative memory address and a single set of one or more instructions to write the data segments. The first memory portion detects that the received sub-request includes an instruction to write data, and in response, identifies a first data segment allocated to the first memory portion, places the first data segment into a buffer of the first memory portion, and writes the buffered first data segment to a location in non-volatile memory of the first memory portion.