Invention Grant
- Patent Title: Method for CMP of high-K metal gate structures
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Application No.: US14686618Application Date: 2015-04-14
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Publication No.: US09646840B2Publication Date: 2017-05-09
- Inventor: Jian Zhao , Hangping Wang
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
- Applicant Address: CN Shanghai
- Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee Address: CN Shanghai
- Agency: Kilpatrick Townsend & Stockton LLP
- Priority: CN201410226180 20140526
- Main IPC: H01L21/306
- IPC: H01L21/306 ; H01L21/28 ; H01L21/8234 ; H01L29/66 ; H01L21/321

Abstract:
A method for manufacturing a semiconductor device includes providing a substrate containing a front-end device and forming a dielectric layer on the substrate. The front-end device includes a first dummy gate in a first type metal gate transistor region, a second dummy gate in a second type metal gate transistor region, and a polysilicon gate in a polysilicon gate region. The method also includes removing a thickness of the first, second, and polysilicon gates and forming a protective layer on the polysilicon layer to protect the polysilicon layer during a CMP process, thereby improving the performance and yield of the semiconductor device.
Public/Granted literature
- US20150340451A1 METHOD FOR CMP OF HIGH-K METAL GATE STRUCTURES Public/Granted day:2015-11-26
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