Invention Grant
- Patent Title: Depression filling method and processing apparatus
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Application No.: US14582243Application Date: 2014-12-24
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Publication No.: US09646879B2Publication Date: 2017-05-09
- Inventor: Akinobu Kakimoto , Youichirou Chiba , Takumi Yamada , Daisuke Suzuki
- Applicant: TOKYO ELECTRON LIMITED
- Applicant Address: JP Tokyo
- Assignee: TOKYO ELECTRON LIMITED
- Current Assignee: TOKYO ELECTRON LIMITED
- Current Assignee Address: JP Tokyo
- Agency: Nath, Goldberg & Meyer
- Agent Jerald L. Meyer
- Priority: JP2013-270893 20131227
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/285 ; C30B1/02 ; C30B29/06 ; H01L21/67 ; H01L21/02 ; C30B25/00

Abstract:
A depression filling method for filling a depression of a workpiece including a semiconductor substrate and an insulating film formed on the semiconductor substrate includes: forming an impurity-doped first semiconductor layer along a wall surface which defines the depression; forming, on the first semiconductor layer, a second semiconductor layer which is lower in impurity concentration than the first semiconductor layer and which is smaller in thickness than the first semiconductor layer; annealing the workpiece to form an epitaxial region at the bottom of the depression corresponding to crystals of the semiconductor substrate from the first semiconductor layer and the second semiconductor layer; and etching the first amorphous semiconductor region and the second amorphous semiconductor region.
Public/Granted literature
- US20150187643A1 Depression Filling Method and Processing Apparatus Public/Granted day:2015-07-02
Information query
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