Invention Grant
- Patent Title: Paired edge alignment
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Application No.: US13964231Application Date: 2013-08-12
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Publication No.: US09646902B2Publication Date: 2017-05-09
- Inventor: Lee Yung-Yao , Ying Ying Wang , Yi-Ping Hsieh
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsin-Chu
- Agency: Cooper Legal Group, LLC
- Main IPC: G01B11/02
- IPC: G01B11/02 ; H01L23/00 ; H01L21/66 ; G03F9/00

Abstract:
Among other things, one or more systems and techniques for scanner alignment sampling are provided. A set of scan region pairs are defined along a periphery of a sampling area associated with a semiconductor wafer. Alignment marks are formed within scan regions of the set of scan region pairs, but are not formed within other regions of the sampling area. In this way, scan region pairs are scanned to determine alignment factors for respective scan region pairs. An alignment for the sampling area, such as layers or masks used to form patterns onto such layers, is determined based upon alignment factors determined for the scan region pairs.
Public/Granted literature
- US20150042994A1 PAIRED EDGE ALIGNMENT Public/Granted day:2015-02-12
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