Invention Grant
- Patent Title: N-channel and P-channel end-to-end finFET cell architecture
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Application No.: US14526072Application Date: 2014-10-28
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Publication No.: US09646966B2Publication Date: 2017-05-09
- Inventor: Victor Moroz
- Applicant: SYNOPSYS, INC.
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Haynes Beffel & Wolfeld LLP
- Agent Yiding Wu
- Main IPC: H01L27/088
- IPC: H01L27/088 ; G06F17/50 ; H01L27/02 ; H01L27/092 ; H01L29/06 ; H01L29/423 ; H01L29/78 ; H01L21/8238

Abstract:
A finFET block architecture uses end-to-end finFET blocks. A first set of semiconductor fins having a first conductivity type and a second set of semiconductor fins having a second conductivity type can be aligned end-to-end. An inter-block isolation structure separates the semiconductor fins in the first and second sets. The ends of the fins in the first set are proximal to a first side of the inter-block isolation structure and ends of the fins in the second set are proximal to a second side of the inter-block isolation structure. A patterned gate conductor layer includes a first gate conductor extending across at least one fin in the first set of semiconductor fins, and a second gate conductor extending across at least one fin in the second set of semiconductor fins. The first and second gate conductors are connected by an inter-block conductor.
Public/Granted literature
- US20150041924A1 N-CHANNEL AND P-CHANNEL END-TO-END FINFET CELL ARCHITECTURE Public/Granted day:2015-02-12
Information query
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