Invention Grant
- Patent Title: System and method of encoding in a serializer/deserializer
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Application No.: US14578100Application Date: 2014-12-19
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Publication No.: US09647688B1Publication Date: 2017-05-09
- Inventor: Mitchell G. Poplack , Simon Sabato
- Applicant: Cadence Design Systems, Inc.
- Applicant Address: US CA San Jose
- Assignee: CADENCE DESIGN SYSTEMS, INC.
- Current Assignee: CADENCE DESIGN SYSTEMS, INC.
- Current Assignee Address: US CA San Jose
- Agency: Arnold & Porter Kaye Scholer LLP
- Main IPC: H03M13/00
- IPC: H03M13/00 ; H03M13/03

Abstract:
A method of encoding a data word in a physical coding sublayer before serial transmission is provided, where data words comprising data bits are received, and the data words encoded using one or more 8B/10B encodings to generate 8B/10B transmission characters. ECC check bits are then generated, and the transmission characters and ECC check bits DC balanced prior to shuffling the bits together to form an encoded word to be transmitted. A receiver may decode by implementing a decode process with error correction. In some embodiments 26 data bits from two 13-bit word are encoded into a 40-bit encoded word. Bits of two or more encoded words may be interleaved for transmission, or multiple copies of encoded words sent. An integrated circuit serializer/deserializer comprises hardware to perform encoding and/or decoding. A hardware functional verification system may also implement the disclosed encoding/decoding for interconnections between emulation chips.
Information query
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