Reducing power requirements and switching during logic built-in-self-test and scan test
Abstract:
A number of switching transitions of flip-flops during testing is kept below a threshold. Scan-in test data is applied to the flip-flops. Testing result data scanned-out from the flip-flops is captured, and a prediction is made of a number of switching transitions of the flip-flops between a current capture clock cycle and a next capture clock cycle—in particular, for the next capture clock cycle—thereby using the scan-in test data for the next capture clock cycle and the testing result data scanned-out of the current capture clock cycle. Furthermore, the testing setup values are modified before the next testing cycle is executed based on the prediction in order to enter a new configuration of a testing circuit such that the predicted number of switching transitions of the flip-flops stays below the threshold. The testing setup values comprise parameters for modifying the capture clock cycle and a seed value for generating test patterns.
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