Invention Grant
- Patent Title: Partially filled contact and trace layout
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Application No.: US12902958Application Date: 2010-10-12
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Publication No.: US09651812B1Publication Date: 2017-05-16
- Inventor: Tao Peng
- Applicant: Tao Peng
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: G02F1/1335
- IPC: G02F1/1335 ; G02F1/1333 ; G06F3/041

Abstract:
An apparatus including a first layer formed from a first conductive material having a first coefficient of thermal expansion and a second layer, coupled to the first layer, the second layer formed from a second conductive material having a second coefficient of thermal expansion, where the second layer is partially filled.
Information query
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