Invention Grant
- Patent Title: Instruction set architecture with opcode lookup using memory attribute
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Application No.: US15054515Application Date: 2016-02-26
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Publication No.: US09652239B2Publication Date: 2017-05-16
- Inventor: Adam J. Muff , Paul E. Schardt , Robert A. Shearer , Matthew R. Tubbs
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Middleton Reutlinger
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F12/10

Abstract:
A method decodes instructions based in part on one or more decode-related attributes stored in a memory address translation data structure such as an Effective To Real Translation (ERAT) or Translation Lookaside Buffer (TLB). A memory address translation data structure may be accessed, for example, in connection with a decode of an instruction stored in a page of memory, such that one or more attributes associated with the page in the data structure may be used to control how that instruction is decoded.
Public/Granted literature
- US20160179543A1 INSTRUCTION SET ARCHITECTURE WITH OPCODE LOOKUP USING MEMORY ATTRIBUTE Public/Granted day:2016-06-23
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