In an electronic apparatus in which a plurality of controller chips are cascade-connected, if an error occurs in a given chip, the present invention allows at least chips on the upstream side of the error chip to share the existence of the error chip. The electronic apparatus of this invention includes a plurality of control chips which are cascade-connected. Each control chip includes a watchdog timer, and a transfer unit configured to supply, to a second another control chip positioned on the upstream side, as an interrupt signal from the watchdog timer, an OR signal of an interrupt signal generated by the watchdog timer and an interrupt signal generated by another watchdog timer in a first another control chip positioned on the downstream side.