Invention Grant
- Patent Title: Memory controller, nonvolatile semiconductor memory device and memory system
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Application No.: US14712017Application Date: 2015-05-14
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Publication No.: US09653156B2Publication Date: 2017-05-16
- Inventor: Masanobu Shirakawa , Tsuyoshi Atsumi , Hidetaka Tsuji , Tomoyuki Kantani , Hideaki Yamamoto , Yasuhiko Kurosawa
- Applicant: KABUSHIKI KAISHA TOSHIBA
- Applicant Address: JP Minato-ku
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: G11C11/56
- IPC: G11C11/56 ; G11C7/04

Abstract:
According to one embodiment, a memory system includes a nonvolatile semiconductor memory and a memory controller. The memory controller has a first signal generation section that generates a first signal related with a read voltage used for read operation of the nonvolatile semiconductor memory, a second signal generation section that generates a second signal that specifies the temperature coefficient used for the correction for temperature of the read voltage, and a first interface section that outputs the first signal, the second signal and a read command. The nonvolatile semiconductor memory has a word line, a memory cell array includes memory cells connected to the word line, and a second interface section that receives the first signal, the second signal and the read command.
Public/Granted literature
- US20160247561A1 MEMORY CONTROLLER, NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM Public/Granted day:2016-08-25
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