Invention Grant
- Patent Title: Double aspect ratio trapping
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Application No.: US15162164Application Date: 2016-05-23
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Publication No.: US09653285B2Publication Date: 2017-05-16
- Inventor: Kangguo Cheng , Bruce B. Doris , Ali Khakifirooz , Alexander Reznicek
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Daniel P. Morris, Esq
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/267 ; H01L21/302 ; H01L21/311 ; H01L29/06 ; H01L29/165 ; H01L21/762 ; H01L29/04 ; H01L21/8258

Abstract:
A semiconductor structure is provided by a process in which two aspect ratio trapping processes are employed. The structure includes a semiconductor substrate portion of a first semiconductor material having a first lattice constant. A plurality of first semiconductor-containing pillar structures of a second semiconductor material having a second lattice constant that is greater than the first lattice constant extend upwards from a surface of the semiconductor substrate portion. A plurality of second semiconductor-containing pillar structures of a third semiconductor material having a third lattice constant that is greater than the first lattice constant extend upwards from another surface of the semiconductor substrate portion. A spacer separates each first semiconductor-containing pillar structure from each second semiconductor-containing pillar structure. Each second semiconductor-containing pillar structure has a width that is different from a width of each first semiconductor-containing pillar structure.
Public/Granted literature
- US20160268383A1 DOUBLE ASPECT RATIO TRAPPING Public/Granted day:2016-09-15
Information query
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