Invention Grant
- Patent Title: 3D NAND staircase CD fabrication utilizing ruthenium material
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Application No.: US15154599Application Date: 2016-05-13
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Publication No.: US09653311B1Publication Date: 2017-05-16
- Inventor: Seul Ki Ahn , Seung-Young Son , Gill Yong Lee
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: APPLIED MATERIALS, INC.
- Current Assignee: APPLIED MATERIALS, INC.
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson + Sheridan, LLP
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L21/3065 ; H01L21/308

Abstract:
Embodiments of the present disclosure provide an apparatus and methods for forming stair-like structures with accurate profiles and dimension control for manufacturing three dimensional (3D) stacked semiconductor devices. In one embodiment, a method of forming stair-like structures on a substrate includes forming a film stack including a dielectric layer and a ruthenium containing material, and etching the ruthenium containing material in the film stack exposed by a patterned photoresist layer utilizing a first etching gas mixture comprising an oxygen containing gas.
Information query
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