Invention Grant
- Patent Title: Flip chip package structure and fabrication process thereof
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Application No.: US14094278Application Date: 2013-12-02
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Publication No.: US09653355B2Publication Date: 2017-05-16
- Inventor: Xiaochun Tan
- Applicant: Silergy Semiconductor Technology (Hangzhou) LTD
- Applicant Address: CN Hangzhou
- Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
- Current Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
- Current Assignee Address: CN Hangzhou
- Agent Michael C. Stephens, Jr.
- Priority: CN201210550325 20121217
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768 ; H01L23/00 ; H01L23/31

Abstract:
Disclosed herein are various chip packaging structures and methods of fabrication. In one embodiment, a flip chip package structure can include: (i) a pad on a chip; (ii) an isolation layer on the chip and the pad, where the isolation layer includes a through hole that exposes a portion of an upper surface of the pad; (iii) a metal layer on the pad, where the metal layer fully covers the exposed upper surface portion of the pad; and (iv) a bump on the metal layer, where side edges of the bump do not make contact with the isolation layer.
Public/Granted literature
- US20140167256A1 FLIP CHIP PACKAGE STRUCTURE AND FABRICATION PROCESS THEREOF Public/Granted day:2014-06-19
Information query
IPC分类: