Invention Grant
- Patent Title: MOSFET having source region formed in a double wells region
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Application No.: US13541539Application Date: 2012-07-03
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Publication No.: US09653459B2Publication Date: 2017-05-16
- Inventor: Hsueh-Liang Chou , Chun-Wai Ng , Po-Chih Su , Ruey-Hsin Liu
- Applicant: Hsueh-Liang Chou , Chun-Wai Ng , Po-Chih Su , Ruey-Hsin Liu
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L29/78 ; H01L29/66 ; H01L29/08 ; H01L27/092 ; H01L29/06 ; H01L21/761
Abstract:
A MOS transistor comprises a substrate of a first conductivity, a first region of the first conductivity formed over the substrate, a second region of the first conductivity formed in the first region, a first drain/source region of a second conductivity formed in the second region, a second drain/source region of the second conductivity and a body contact region of the first conductivity, wherein the body contact region and the first drain/source region are formed in an alternating manner from a top view.
Public/Granted literature
- US20140008724A1 Apparatus and Method for MOS Transistor Public/Granted day:2014-01-09
Information query
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