Invention Grant
- Patent Title: Pad structure exposed in an opening through multiple dielectric layers in BSI image sensor chips
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Application No.: US15155961Application Date: 2016-05-16
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Publication No.: US09653508B2Publication Date: 2017-05-16
- Inventor: Jeng-Shyan Lin , Dun-Nian Yaung , Jen-Cheng Liu , Wen-De Wang , Shuang-Ji Tsai , Yueh-Chiou Lin
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L27/00
- IPC: H01L27/00 ; H01L27/146 ; H01L23/48 ; H01L21/768 ; H01L23/00 ; H01L23/525

Abstract:
An integrated circuit structure includes a semiconductor substrate, and a dielectric pad extending from a bottom surface of the semiconductor substrate up into the semiconductor substrate. A low-k dielectric layer is disposed underlying the semiconductor substrate. A first non-low-k dielectric layer is underlying the low-k dielectric layer. A metal pad is underlying the first non-low-k dielectric layer. A second non-low-k dielectric layer is underlying the metal pad. An opening extends from a top surface of the semiconductor substrate down to penetrate through the semiconductor substrate, the dielectric pad, and the low-k dielectric layer, wherein the opening lands on a top surface of the metal pad. A passivation layer includes a portion on a sidewall of the opening, wherein a portion of the passivation layer at a bottom of the opening is removed.
Public/Granted literature
- US20160260764A1 Pad Structure Exposed in an Opening Through Multiple Dielectric Layers in BSI Image Sensor Chips Public/Granted day:2016-09-08
Information query
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