Invention Grant
- Patent Title: Semiconductor substrate, semiconductor device and method of manufacturing semiconductor device
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Application No.: US15055707Application Date: 2016-02-29
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Publication No.: US09653553B2Publication Date: 2017-05-16
- Inventor: Chiharu Ota , Johji Nishio , Kazuto Takao
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2015-047222 20150310
- Main IPC: H01L29/15
- IPC: H01L29/15 ; H01L29/16 ; H01L29/04 ; H01L29/34 ; C30B29/36 ; H01L29/32 ; H01L29/868 ; H01L21/02

Abstract:
A semiconductor substrate of an embodiment includes a SiC layer having a surface inclined in a direction plus or minus 5° from a {0001} face at an off angle of 0° to 10°. Area density of threading edge dislocation clusters in the SiC layer is 18.8 cm−2 or less, each of the threading edge dislocation clusters includes a plurality of threading edge dislocations on the surface, the threading edge dislocations included in each of the threading edge dislocation clusters exist in a region that extends in a [1-100] direction plus or minus 5° and has a width of 30 μm or less, each of the threading edge dislocation clusters includes at least three threading edge dislocations adjacent at an interval of 30 μm or less, and an interval of adjacent threading edge dislocations in each of the threading edge dislocation clusters is 70 μm or less.
Public/Granted literature
- US20160268381A1 SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2016-09-15
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