Invention Grant
- Patent Title: Selective etching in the formation of epitaxy regions in MOS devices
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Application No.: US15043922Application Date: 2016-02-15
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Publication No.: US09653574B2Publication Date: 2017-05-16
- Inventor: Yu-Hung Cheng , Chii-Horng Li , Tze-Liang Lee
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/66 ; H01L21/3065 ; H01L21/8234 ; H01L27/11 ; H01L29/78 ; H01L21/02

Abstract:
A method for forming a semiconductor structure includes forming a gate stack over a semiconductor substrate; forming a recess in the semiconductor substrate and adjacent the gate stack; and performing a selective epitaxial growth to grow a semiconductor material in the recess to form an epitaxy region. After the step of performing the selective epitaxial growth, a selective etch-back is performed to the epitaxy region. The selective etch-back is performed using process gases comprising a first gas for growing the semiconductor material, and a second gas for etching the epitaxy region.
Public/Granted literature
- US20160163827A1 Selective Etching in the Formation of Epitaxy Regions in MOS Devices Public/Granted day:2016-06-09
Information query
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