Invention Grant
- Patent Title: Semiconductor device
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Application No.: US14918517Application Date: 2015-10-20
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Publication No.: US09654001B2Publication Date: 2017-05-16
- Inventor: Shinji Ujita , Tatsuo Morita
- Applicant: Panasonic Intellectual Property Management Co., Ltd.
- Applicant Address: JP Osaka
- Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2013-105797 20130520
- Main IPC: H01L29/778
- IPC: H01L29/778 ; H02M3/158 ; H01L27/02 ; H01L27/088 ; H01L29/417 ; H01L29/20 ; H01L23/482 ; H01L23/535 ; H01L29/10 ; H01L27/06

Abstract:
A semiconductor device includes a semiconductor layer laminate disposed on a semiconductor substrate, a first and a second low-side transistors, and a first and a second high-side transistors. Each of the transistors is disposed on the semiconductor layer laminate, and includes a gate electrode, a source electrode, and a drain electrode. The second low-side transistor is disposed between the first low-side transistor and the first high-side transistor, and the first high-side transistor is disposed between the second low-side transistor and the second high-side transistor. The source electrodes of the first and the second low-side transistors are combined into one source electrode, the drain electrodes of the first and the second high-side transistors are combined into one drain electrode, and the drain electrode of the second low-side transistor and the source electrode of the first high-side transistor are combined into one first electrode.
Public/Granted literature
- US20160043643A1 SEMICONDUCTOR DEVICE Public/Granted day:2016-02-11
Information query
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