Invention Grant
- Patent Title: Test board and method for qualifying a printed circuit board assembly and/or repair process
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Application No.: US14619506Application Date: 2015-02-11
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Publication No.: US09658280B2Publication Date: 2017-05-23
- Inventor: Terry L. Munson , Steve Middleton
- Applicant: Foresite, Inc.
- Applicant Address: US IN Kokomo
- Assignee: Foresite, Inc.
- Current Assignee: Foresite, Inc.
- Current Assignee Address: US IN Kokomo
- Agency: Woodard, Emhardt, Moriarty, McNett & Henry LLP
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
A method for qualifying circuit board fabrication, assembly, and repair processes includes establishing primary assembly process specifications and secondary repair process specifications. A group of test circuit boards is assembled using the primary assembly process, with each board having a section of components linked together to provide functional circuits and a section of components daisy-chained together to provide non-functional circuits, and with each section also including SIR test patterns and CAF test patterns. A subset of the assembled test boards is then repaired using the secondary repair process. A sample of each set of the test boards is exposed to test conditions including thermal cycle test conditions, humidity test conditions, and vibration test conditions. Inner layer build quality, surface cleanliness, circuit performance, and solder joint quality are then evaluated using the provided circuitry.
Public/Granted literature
- US20150226789A1 TEST BOARD AND METHOD FOR QUALIFYING A PRINTED CIRCUIT BOARD ASSEMBLY AND/OR REPAIR PROCESS Public/Granted day:2015-08-13
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