Semiconductor memory apparatus and system using the same
Abstract:
A semiconductor memory apparatus includes a command input unit configured to generate an internal command in response to an external command and a selective input unit configured to transmit selection signals to one of a first internal circuit. The selective input unit transmits the selection signals to the first internal circuit when the internal command is not a predetermined command and transmits the selection signals to the second internal circuit when the internal command is the predetermined command.
Public/Granted literature
Information query
Patent Agency Ranking
0/0