Invention Grant
- Patent Title: Methods and apparatus of packaging semiconductor devices
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Application No.: US14853006Application Date: 2015-09-14
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Publication No.: US09659890B2Publication Date: 2017-05-23
- Inventor: Chia-Wei Tu , Yian-Liang Kuo , Tsung-Fu Tsai , Ru-Ying Huang , Ming-Song Sheu , Hsien-Wei Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/31 ; H01L23/525

Abstract:
Methods and apparatuses for wafer level packaging (WLP) semiconductor devices are disclosed. A redistribution layer (RDL) is formed on a first passivation layer in contact with a conductive pad over a surface of a die. The RDL layer is on top of a first region of the first passivation layer. A second passivation layer is formed on the RDL layer with an opening to expose the RDL layer, and over the first passivation layer. An under bump metallization (UBM) layer is formed over the second passivation layer in contact with the exposed RDL layer. A second region of the first passivation layer disjoint from the first region is determined by projecting an outer periphery of a solder ball or other connector onto the surface.
Public/Granted literature
- US20160005704A1 Methods and Apparatus of Packaging Semiconductor Devices Public/Granted day:2016-01-07
Information query
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