Invention Grant
- Patent Title: Semiconductor device having a die and through-substrate via
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Application No.: US14948664Application Date: 2015-11-23
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Publication No.: US09659900B2Publication Date: 2017-05-23
- Inventor: Xuejun Ying , Arkadii V. Samoilov , Peter McNally , Tyler Parent
- Applicant: Maxim Integrated Products, Inc.
- Applicant Address: US CA San Jose
- Assignee: Maxim Intergrated Products, Inc.
- Current Assignee: Maxim Intergrated Products, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Advent, LLP
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L23/00 ; H01L23/538 ; H01L23/498 ; H01L23/31 ; H01L23/13 ; H01L23/14 ; H01L21/48 ; H01L23/544 ; H01L21/306 ; H01L21/683 ; H01L23/532 ; H01L21/56 ; H01L25/065

Abstract:
Semiconductor devices are described that have a through-substrate via formed therein. In one or more implementations, the semiconductor devices include a semiconductor wafer and an integrated circuit die bonded together with an adhesive material. The semiconductor wafer and the integrated circuit die include one or more integrated circuits formed therein. The integrated circuits are connected to one or more conductive layers deployed over the surfaces of the semiconductor wafer and an integrated circuit die. A via is formed through the semiconductor wafer and the patterned adhesive material so that an electrical interconnection can be formed between the integrated circuits formed in the semiconductor wafer and the integrated circuits formed in the integrated circuit die. The via includes a conductive material that furnishes the electrical interconnection between the semiconductor wafer and the integrated circuit die.
Public/Granted literature
- US20160079197A1 SEMICONDUCTOR DEVICE HAVING A DIE AND THROUGH-SUBSTRATE VIA Public/Granted day:2016-03-17
Information query
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