Invention Grant
- Patent Title: One time programmable memory with a twin gate structure
-
Application No.: US14871792Application Date: 2015-09-30
-
Publication No.: US09659944B2Publication Date: 2017-05-23
- Inventor: Qintao Zhang , Mei Xue , Wenwei Yang , Akira Ito
- Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H01L27/112
- IPC: H01L27/112 ; G11C17/16 ; G11C17/18

Abstract:
A one-time programmable memory (OTP) is provided that includes a combined word line programming line (WL-PL). The OTP includes a programmable transistor having a first threshold voltage and a first breakdown voltage, and a pass transistor having a second threshold voltage and a second breakdown voltage. The combined WL-PL is electrically connected to respective gate electrodes of both the programmable transistor and the pass transistor so that both receive the same control voltage. The second gate electrode has a work function that is greater than that of the first gate electrode, so that the second gate breakdown voltage is greater than the first gate breakdown voltage, which enables the use of the combined WL-PL.
Public/Granted literature
- US20170005103A1 One Time Programmable Memory with a Twin Gate Structure Public/Granted day:2017-01-05
Information query
IPC分类: