Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US14975987Application Date: 2015-12-21
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Publication No.: US09666494B2Publication Date: 2017-05-30
- Inventor: Atsuhiko Suda , Kazuyuki Toyoda , Toshiyuki Kikuchi
- Applicant: HITACHI KOKUSAI ELECTRIC INC.
- Applicant Address: JP Tokyo
- Assignee: Hitachi Kokusai Electric, Inc.
- Current Assignee: Hitachi Kokusai Electric, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Volpe and Koenig, P.C.
- Priority: JP2015-071085 20150331
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L21/321 ; H01L21/3213 ; C23C16/24 ; C23C16/56

Abstract:
The present disclosure provides a technique capable of suppressing a deviation in a characteristic of a semiconductor device. There is provided a technique includes: (a) receiving data representing a thickness distribution of a polished silicon-containing layer on a substrate comprising a convex structure whereon the polished silicon-containing layer is formed; (b) calculating, based on the data, a process data for reducing a difference between a thickness of a portion of the polished silicon-containing layer formed at a center portion of the substrate and that of the polished silicon-containing layer formed at a peripheral portion of the substrate; (c) loading the substrate into a process chamber; (d) supplying a process gas to the substrate; and (e) compensating for the difference based on the process data by activating the process gas with a magnetic field having a predetermined strength on the substrate.
Public/Granted literature
- US20160293498A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2016-10-06
Information query
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