A memory cell can be formed with a pair of charge storage regions. The pair of charge storage regions can be two portions of a charge storage region that are located at the same level and are positioned adjacent to two different control gate electrodes. Alternately, the pair of charge storage regions can be two disjoined structures located on opposite sides of a portion of a semiconductor channel. Yet alternately, the pair of charge storage regions can be two disjoined structures located at the same level, and on two laterally split semiconductor channel. The memory cell can be employed to store two bits of information within the pair of charge storage regions located at the same level within a vertical memory string that employs a single memory opening.