Invention Grant
- Patent Title: Response collector circuitry coupled with through silicon via and tap
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Application No.: US14826617Application Date: 2015-08-14
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Publication No.: US09671426B2Publication Date: 2017-06-06
- Inventor: Lee D. Whetsel
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Charles A. Brill; Frank D. Cimino
- Main IPC: G01R31/26
- IPC: G01R31/26 ; G01R1/04 ; B05C21/00 ; B44D3/12 ; G01R31/28 ; G01R31/42
Abstract:
The disclosure describes a novel method and apparatus for improving silicon interposers to include test circuitry for testing stacked die mounted on the interposer. The improvement allows for the stacked die to be selectively tested by an external tester or by the test circuitry included in the interposer.
Public/Granted literature
- US20170131325A9 RESPONSE COLLECTOR CIRCUITRY COUPLED WITH THROUGH SILICON VIA AND TAP Public/Granted day:2017-05-11
Information query
