A noise detection circuit may include a divider configured to receive a clock signal and a clock bar signal, divide the clock signal and the clock bar signal, and generate a first divided signal and a second divided signal. The noise detection circuit may also include a noise detection reference block configured to reflect a power supply voltage level variation on the first divided signal and the second divided signal, and generate a first reference signal and a second reference signal, and a duty sensing circuit configured to generate first duty information and second duty information of the clock signal in response to the first reference signal and the second reference signal. The noise detection circuit may also include a detection circuit configured to generate a noise detection signal in response to the first duty information and the second duty information.