Test system for semiconductor apparatus and test method using the same
Abstract:
A test system for a semiconductor apparatus that includes a calibration board having first skew information therein and outputting a plurality of test signals, and a main board configured to perform first skew correction for correcting skews of the test signals based on the first skew information and perform secondary skew correction for correcting an I/O skew thereof using the plurality of test signals.
Information query
Patent Agency Ranking
0/0