Invention Grant
- Patent Title: Leakage reduction technique for low voltage LDOs
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Application No.: US14547229Application Date: 2014-11-19
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Publication No.: US09671804B2Publication Date: 2017-06-06
- Inventor: Frank Kronmueller , Ambreesh Bhattad , Burak Dundar
- Applicant: Dialog Semiconductor GmbH
- Applicant Address: GB London
- Assignee: Dialog Semiconductor (UK) Limited
- Current Assignee: Dialog Semiconductor (UK) Limited
- Current Assignee Address: GB London
- Agency: Saile Ackerman LLC
- Agent Stephen B. Ackerman
- Priority: DE102014213963 20140717
- Main IPC: G05F1/575
- IPC: G05F1/575 ; G05F1/46 ; G05F1/569

Abstract:
The present document relates to multi-stage amplifiers, such as linear regulators (e.g. low-dropout regulators). A method and a circuit for reducing leakage current of such multi-stage amplifiers is presented. A voltage regulator is described. The voltage regulator comprises a pass device configured to provide a load current at a regulated output voltage to an output node of the voltage regulator. A source of the pass device is coupled to a first potential of the voltage regulator. Furthermore, the voltage regulator comprises drive circuitry configured to control the pass device via a gate of the pass device, based on a reference voltage and based on a feedback voltage derived from the output voltage. In addition, the voltage regulator comprises leakage reduction circuitry configured to pull-up the gate of the pass device using a second potential; wherein the second potential is higher than the first potential.
Public/Granted literature
- US20160018834A1 Leakage Reduction Technique for Low Voltage LDOs Public/Granted day:2016-01-21
Information query
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