A system and process that incorporates teachings of the subject disclosure may include, for example, transitioning a processor from a high-power consumption state to a low-power consumption state, wherefrom return to the high-power consumption state includes a boot process. Future demand for operation of the processor in the high-power consumption state is predicted, while the processor is in the low-power consumption state. The processor is transitioned from the low-power consumption state to the high-power consumption state in response to predicting future demand for operation of the processor in the high-power consumption state. Such transition of the processor from the low-power consumption state to the high-power consumption state sufficiently precedes actual demand for operation of the processor in the high-power consumption state so as to avoid perceptible user delay. Other embodiments are disclosed.