Memory controller, storage apparatus, information processing system, and control method for the same
Abstract:
There is provided a memory controller that includes an address conversion information buffer that stores address conversion information about a correlation between logical and physical addresses, the physical address including a memory area number, an address conversion section that converts the logical address into the physical address in accordance with the address conversion information, the logical address being in a command issued by a host computer, an allocation information storage section that stores allocation information indicating a correlation between an access size and the memory area number, a memory identification section that outputs the memory area number in accordance with the allocation information, the memory area number corresponding to the access size in the command, and a control section that performs, when the memory area number in the physical address is different from the one identified by the memory identification section, data writing to the identified memory area.
Information query
Patent Agency Ranking
0/0