Invention Grant
- Patent Title: Methods and apparatus for determining memory access patterns for cache prefetch in an out-of-order processor
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Application No.: US14597682Application Date: 2015-01-15
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Publication No.: US09672154B1Publication Date: 2017-06-06
- Inventor: Hunglin Hsu , Viney Gautam , Yicheng Guo , Warren Menezes
- Applicant: Marvell International Ltd.
- Applicant Address: BM Hamilton
- Assignee: Marvell International Ltd.
- Current Assignee: Marvell International Ltd.
- Current Assignee Address: BM Hamilton
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/0862

Abstract:
In aspects of determining memory access patterns for cache prefetch in an out-of-order processor, data is maintained in a cache when copied from system memory of a computing device, and load data instructions are processed to access the cache data. The load data instructions include incremental load data instructions and non-incremental load data instructions that access the data from contiguous memory addresses. The data is prefetched ahead of processing the load data instructions, where prefetch requests are initiated based on the load data instructions. A stride is calculated as the distance between the incremental load data instructions. Further, the stride can be corrected for the non-incremental load data instructions to correlate with the calculated stride. The corrected stride represents the data as a sequential data stream having a fixed stride, and prefetching the data appears sequential for both the incremental and non-incremental load data instructions.
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