Synthesis of reduced netlist having positive elements and no controlled sources

Invention Grant

US09672318B2 Synthesis of reduced netlist having positive elements and no controlled sources 有权

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Patent Title: Synthesis of reduced netlist having positive elements and no controlled sources
Application No.: US14754464

Application Date: 2015-06-29
Publication No.: US09672318B2

Publication Date: 2017-06-06
Inventor: Yiannis Moisiadis , Nikolaos Mouravliansky
Applicant: Helic, Inc.
Applicant Address: US CA Santa Clara
Assignee: HELIC, INC.
Current Assignee: HELIC, INC.
Current Assignee Address: US CA Santa Clara
Agency: Nixon Peabody, LLP
Agent Khaled Shami
Main IPC: G06F17/50
IPC: G06F17/50

Synthesis of reduced netlist having positive elements and no controlled sources

Abstract:

In one embodiment, a circuit analysis method includes obtaining a netlist of a circuit, generating a reduced model from the netlist, using the reduced model to synthesize a positive netlist having no controlled current or voltage sources, unstamping the synthesized positive netlist, and simulating the circuit using the unstamped synthesized positive netlist.

Public/Granted literature

US20160378905A1 SYNTHESIS OF REDUCED NETLIST HAVING POSITIVE ELEMENTS AND NO CONTROLLED SOURCES Public/Granted day:2016-12-29

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