Invention Grant
- Patent Title: Interconnect structure with enhanced reliability
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Application No.: US14529431Application Date: 2014-10-31
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Publication No.: US09673089B2Publication Date: 2017-06-06
- Inventor: Griselda Bonilla , Kaushik Chanda , Robert D. Edwards , Ronald G. Filippi , Andrew H. Simon , Ping-Chuan Wang
- Applicant: International Business Machines Corporation
- Applicant Address: CA Ottawa
- Assignee: AURIGA INNOVATIONS, INC
- Current Assignee: AURIGA INNOVATIONS, INC
- Current Assignee Address: CA Ottawa
- Agency: Roberts Mlotkowski Safran Cole & Calderon, P.C.
- Agent Andrew M. Calderon
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768 ; H01L23/532

Abstract:
An improved interconnect structure including a dielectric layer having a conductive feature embedded therein, the conductive feature having a first top surface that is substantially coplanar with a second top surface of the dielectric layer; a metal cap layer located directly on the first top surface, wherein the metal cap layer does not substantially extend onto the second top surface; a first dielectric cap layer located directly on the second top surface, wherein the first dielectric cap layer does not substantially extend onto the first top surface and the first dielectric cap layer is thicker than the metal cap layer; and a second dielectric cap layer on the metal cap layer and the first dielectric cap layer. A method of forming the interconnect structure is also provided.
Public/Granted literature
- US20150056806A1 INTERCONNECT STRUCTURE WITH ENHANCED RELIABILITY Public/Granted day:2015-02-26
Information query
IPC分类: