Efficient fabrication of BiCMOS devices
Abstract:
A bipolar complementary-metal-oxide-semiconductor (BiCMOS) device is disclosed. The BiCMOS device includes a CMOS device in a CMOS region, a PNP bipolar device in a bipolar region, and a spacer clear region defined by an opening in a common spacer layer over the CMOS region and the bipolar region, wherein a sub-collector, a selectively implanted collector, and a base of the PNP bipolar device are formed in the spacer clear region. The PNP bipolar device further includes a collector sinker adjacent to the spacer clear region and electrically connected to the sub-collector of the PNP bipolar device. The BiCMOS device can further include an NPN bipolar device having a sub-collector, a selectively implanted collector and a base in another spacer clear region.
Public/Granted literature
Information query
Patent Agency Ranking
0/0