Invention Grant
- Patent Title: Vertical semiconductor device having frontside interconnections
-
Application No.: US13929872Application Date: 2013-06-28
-
Publication No.: US09673316B1Publication Date: 2017-06-06
- Inventor: Christopher S. Blair , Albert Bergemont , Sudarsan Uppili , Fanling H. Yang , Guillaume Bouche
- Applicant: Maxim Integrated Products, Inc.
- Applicant Address: US CA San Jose
- Assignee: Maxim Integrated Products, Inc.
- Current Assignee: Maxim Integrated Products, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Advent, LLP
- Main IPC: H01L29/80
- IPC: H01L29/80 ; H01L23/48 ; H01L29/78 ; H01L21/50

Abstract:
A semiconductor device including a VDMOS device formed therein includes a terminal, or contact, to the drain region of the VDMOS device from the frontside of the device. In one or more implementations, a semiconductor device includes a semiconductor substrate having a first surface and a second surface and a vertical diffused metal-oxide-semiconductor device formed within the semiconductor substrate. The vertical diffused metal-oxide-semiconductor device includes at least one source region formed proximate to the first surface and at least one drain region formed proximate to the second surface. A through-substrate via is formed within the semiconductor substrate, and the through-substrate via electrically connected to the drain region. The through-substrate via provides an electrical interconnection to the drain region from the first surface.
Information query
IPC分类: