Invention Grant
- Patent Title: Method for manufacturing a fin MOS transistor
-
Application No.: US14959430Application Date: 2015-12-04
-
Publication No.: US09673329B2Publication Date: 2017-06-06
- Inventor: Yves Morand , Romain Wacquez , Laurent Grenouillet , Yannick Le Tiec , Maud Vinet
- Applicant: STMicroelectronics SA , Commissariat A L'Energie Atomique et aux Energies Alternatives
- Applicant Address: FR Montrouge FR Paris
- Assignee: STMicroelectronics SA,Commissariat A L'Energie Atomique et aux Energies Alternatives
- Current Assignee: STMicroelectronics SA,Commissariat A L'Energie Atomique et aux Energies Alternatives
- Current Assignee Address: FR Montrouge FR Paris
- Agency: Gardere Wynne Sewell LLP
- Priority: FR1351827 20130301
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/66 ; H01L29/78

Abstract:
A fin MOS transistor is made from an SOI-type structure that includes a semiconductor layer on a silicon oxide layer coating a semiconductor support. A trench formed from the surface of the semiconductor layer delimits at least one fin in the semiconductor layer, that trench extending at least to an upper surface of the semiconductor support. Etched recesses in sides of a portion of the silicon oxide layer located under the fin are filled with a material selectively etchable over silicon oxide.
Public/Granted literature
- US20160087092A1 METHOD FOR MANUFACTURING A FIN MOS TRANSISTOR Public/Granted day:2016-03-24
Information query
IPC分类: