Invention Grant
- Patent Title: Semiconductor integrated circuit with shutoff control for plural power domains
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Application No.: US15216513Application Date: 2016-07-21
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Publication No.: US09673663B2Publication Date: 2017-06-06
- Inventor: Masayoshi Shiotani
- Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Applicant Address: JP Osaka
- Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2009-134510 20090603
- Main IPC: G06F1/26
- IPC: G06F1/26 ; G06F15/177 ; G06F1/00 ; G06F11/00 ; G06F19/20 ; G06F19/00 ; H02J9/06 ; G06F1/30 ; H03K19/00 ; G06F1/32 ; G06F1/16 ; G06F13/38 ; G06F1/24 ; G06F13/40

Abstract:
A constantly power-ON domain and a standby-time power OFF domain are included on the same chip, and the constantly power-ON domain includes: a shutoff control circuit shutting off a signal inputted and outputted between the constantly power-ON domain and the standby-time power OFF domain when the first power source is ON and the second power source is OFF; and a shutoff control circuit outputting a first control signal indicating that shutoff of an emergent shutoff control circuit unit is to be enabled or disabled, the standby-time power OFF domain includes the emergent shutoff control circuit unit shutting off, based on the first control signal from the shutoff control circuit, the signal inputted between the emergent shutoff control circuit unit and the constantly power-ON domain.
Public/Granted literature
- US20170012466A1 SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2017-01-12
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