Circuits and methods for detecting, identifying and/or removing undesired content are provided. According to one embodiment, a system includes a co-processor (CP), a first memory, a general purpose processor (GPP) and a second memory. The first memory is associated with the CP and coupled to the CP. The first memory includes a first signature compiled for execution on the CP. The GPP is coupled to the CP. The second memory is associated with the GPP and coupled to the CP and to the GPP. The second memory includes a second signature compiled for execution on the GPP. The CP is operable to retrieve the first signature stored within the first memory through an instruction cache. The CP is operable to retrieve a data segment to be scanned for undesirable content stored within the second memory through a data cache that is separate from the instruction cache.