A semiconductor memory device includes a first memory string including a first memory cell and a second memory cell, a second memory string including a third memory cell, a bit line connected to both one end of the first memory string and one end of the second memory string, a first word line connected to gates of the first and third memory cells, a second word line connected to a gate of the second memory cell, and a control circuit configured to determine a program condition of the first memory cell that have been selected for a write operation, and perform the write operation for the third memory cell based on the program condition of the first memory cell.