Invention Grant
- Patent Title: Method for forming different patterns in a semiconductor structure using a single mask
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Application No.: US14153875Application Date: 2014-01-13
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Publication No.: US09679803B2Publication Date: 2017-06-13
- Inventor: Tsung-Min Huang , Chung-Ju Lee , Chih-Tsung Shih , Yen-Cheng Lu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/47
- IPC: H01L21/47 ; H01L21/76 ; H01L21/30 ; H01L21/46 ; H01L21/768 ; G03F7/00 ; G03F7/09 ; H01L21/027 ; H01L21/311

Abstract:
The present disclosure provides a method for forming an integrated circuit (IC) structure. The method comprises providing a semiconductor structure including a substrate, a dielectric layer formed over the substrate, and a hard mask region formed over the dielectric layer; forming a first photoresist layer over the hard mask region; performing a first lithography exposure using a photomask to form a first latent pattern; forming a second photoresist layer over the hard mask region; and performing a second lithography exposure using the photomask to form a second latent pattern. The photomask includes a first mask feature and a second mask feature. The first latent pattern corresponds to the first mask feature, and the second latent pattern corresponds to the first mask feature and the second mask feature.
Public/Granted literature
- US20150200130A1 METHOD FOR FORMING DIFFERENT PATTERNS IN A SEMICONDUCTOR STRUCTURE USING A SINGLE MASK Public/Granted day:2015-07-16
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