Invention Grant
- Patent Title: Metal gate structure with multi-layer composition
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Application No.: US13871555Application Date: 2013-04-26
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Publication No.: US09679984B2Publication Date: 2017-06-13
- Inventor: Hung-Chin Chung , Shiang-Rung Tsai , Hsien-Ming Lee , Cheng-Lung Hung , Hsiao-Kuan Wei
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/49
- IPC: H01L29/49 ; H01L29/78 ; H01L29/51 ; H01L21/28 ; H01L29/40 ; H01L29/66

Abstract:
The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate and a gate stack disposed on the semiconductor substrate. The gate stack includes a high-k dielectric material layer, a titanium-rich TiN layer over the high-k dielectric layer, and a metal layer disposed over the titanium-rich TiN layer. The metal layer includes aluminum.
Public/Granted literature
- US20140124875A1 Metal Gate Structure with Device Gain and Yield Improvement Public/Granted day:2014-05-08
Information query
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