In accordance with embodiments of the present disclosure, a processing system may include a plurality of processing paths including a first processing path and a second processing path, a digital-to-analog stage output, and a controller. The first processing path may include a first digital-to-analog converter for converting the digital input signal into a first intermediate analog signal, the first digital-to-analog converter configured to operate in a high-power state and a low-power state. The second processing path may include a second digital-to-analog converter for converting a digital input signal into a second intermediate analog signal. The digital-to-analog stage output may be configured to generate an analog signal comprising a sum of the first intermediate analog signal and the second intermediate analog signal. The controller may be configured to operate the first digital-to-analog converter in the lower-power state when a magnitude of the digital input signal is below a threshold magnitude.