Invention Grant
- Patent Title: Memory system with independently adjustable core and interface data rates
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Application No.: US13421623Application Date: 2012-03-15
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Publication No.: US09684623B2Publication Date: 2017-06-20
- Inventor: Frederick A. Ware
- Applicant: Frederick A. Ware
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Peninsula Patent Group
- Agent Lance Kreisman
- Main IPC: G06F13/12
- IPC: G06F13/12 ; G06F13/42
Abstract:
An integrated circuit device is disclosed including core circuitry and interface circuitry. The core circuitry outputs in parallel a set of data bits, while the interface circuitry couples to the core circuitry. The interface circuitry receives in parallel a first number of data bits among the set of data bits from the core circuitry and outputs in parallel a second number of data bits. The ratio of the first number to the second number is a non-power-of-2 value.
Public/Granted literature
- US20120239898A1 MEMORY SYSTEM WITH INDEPENDENTLY ADJUSTABLE CORE AND INTERFACE DATA RATES Public/Granted day:2012-09-20
Information query
