Invention Grant
- Patent Title: Signal reconstruction in sequential logic circuitry
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Application No.: US14882414Application Date: 2015-10-13
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Publication No.: US09684746B2Publication Date: 2017-06-20
- Inventor: Parijat Biswas , Shyam Datta , Subhrajyoti Chakraborty , Minakshi Chakravorty
- Applicant: Synopsys, Inc.
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Fenwick & West LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method for reconstructing at least one output signal associated to a sequential logic circuitry block of a circuit is disclosed. At least one input signal is associated to the sequential logic circuitry block. The method comprises simulating a value of the at least one output signal depending on the at least one input signal and determining a transfer function for computing the value of the output signal directly after the simulation timestamp depending on the input signal and/or on the value of the output signal directly before the simulation timestamp. The method further comprises computing the value of the at least one output signal directly after the simulation timestamp as a function value of the transfer function, if a reconstruction condition is fulfilled.
Public/Granted literature
- US20170103152A1 Signal Reconstruction in Sequential Logic Circuitry Public/Granted day:2017-04-13
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