Invention Grant
- Patent Title: Electronic device and manufacturing method therefor
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Application No.: US13106933Application Date: 2011-05-13
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Publication No.: US09685394B2Publication Date: 2017-06-20
- Inventor: Shigenobu Sekine , Yurina Sekine , Yoshiharu Kuwana
- Applicant: Shigenobu Sekine , Yurina Sekine , Yoshiharu Kuwana
- Applicant Address: JP Tokyo
- Assignee: NAPRA CO., LTD.
- Current Assignee: NAPRA CO., LTD.
- Current Assignee Address: JP Tokyo
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Priority: JP2010-117008 20100521; JP2011-056556 20110315
- Main IPC: H01L33/62
- IPC: H01L33/62 ; H01L21/28 ; H01L23/48 ; H01L21/768

Abstract:
An electronic device includes a semiconductor substrate, an insulating material-filled layer and a vertical conductor. The semiconductor substrate has a vertical hole extending in a thickness direction thereof. The insulating material-filled layer is a ring-shaped layer filled in the vertical hole for covering an inner periphery thereof and includes an organic insulating material or an inorganic insulating material mainly of a glass and a nanocomposite ceramic. The nanocomposite ceramic has a specific resistance of greater than 1014 Ω·cm at room temperature and a relative permittivity of 4 to 9. The vertical conductor is a solidified metal body filled in an area surrounded by the insulating material-filled layer.
Public/Granted literature
- US20110284912A1 ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREFOR Public/Granted day:2011-11-24
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