Invention Grant
- Patent Title: Reliability-aware memory partitioning mechanisms for future memory technologies
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Application No.: US14813097Application Date: 2015-07-29
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Publication No.: US09696923B2Publication Date: 2017-07-04
- Inventor: Dimin Niu , Mu-Tien Chang , Hongzhong Zheng
- Applicant: Dimin Niu , Mu-Tien Chang , Hongzhong Zheng
- Applicant Address: KR
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR
- Agency: Renaissance IP Law Group LLP
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G06F3/06 ; G06F11/10 ; G06F12/02 ; G11C5/02 ; G11C5/14 ; G11C5/04

Abstract:
A memory module (735) can include a memory array (105) and a memory controller (740). The memory controller (740) can include a status register (745) that specifies whether the memory module (735) is operating at normal power or low power. A normal reliability region (305, 505) and a low reliability region (310, 510) can be defined in the memory array (105), based on the power level specified by the status register (745).
Public/Granted literature
- US20160266824A1 RELIABILITY-AWARE MEMORY PARTITIONING MECHANISMS FOR FUTURE MEMORY TECHNOLOGIES Public/Granted day:2016-09-15
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