An apparatus includes input circuitry that splits an input value into first bit-groups. First memory arrays are each populated with first random numbers, receive from the input circuitry a first bit-group, and retrieve and output a first random number from a first address indicated by the received first bit-group. Distribution circuitry splits each first random number output by the first memory arrays into second bit-groups, and distributes the second bit-groups. Second memory arrays are each populated with second random numbers, receive via the distribution circuitry a second bit-group from each first memory array, concatenate the received second bit-groups so as to form an address indicator, and retrieve and output a second random number from a second address indicated by the address indicator. Output circuitry combines the second random numbers output by the second memory arrays into an output random number that depends on the input value.