Invention Grant
- Patent Title: High speed serial peripheral interface memory subsystem
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Application No.: US13313699Application Date: 2011-12-07
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Publication No.: US09697872B2Publication Date: 2017-07-04
- Inventor: Kevin Widmer , Anthony Le , Cliff Zitlaw
- Applicant: Kevin Widmer , Anthony Le , Cliff Zitlaw
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G11C5/02 ; G06F13/42 ; G06F13/16
Abstract:
A memory subsystem is disclosed. The memory subsystem includes a serial peripheral interface (SPI) double data rate (DDR) volatile memory component, a serial peripheral interface (SPI) double data rate (DDR) non-volatile memory component coupled to the serial peripheral interface (SPI) double data rate (DDR) volatile memory component and a serial peripheral interface (SPI) double data rate (DDR) interface. The serial peripheral interface (SPI) double data rate (DDR) interface accesses the serial peripheral interface (SPI) double data rate (DDR) volatile memory component and the serial peripheral interface (SPI) double data rate (DDR) non-volatile memory component where data is accessed on leading and falling edges of a clock signal.
Public/Granted literature
- US20130151751A1 HIGH SPEED SERIAL PERIPHERAL INTERFACE MEMORY SUBSYSTEM Public/Granted day:2013-06-13
Information query
